| 摘要 |
PURPOSE:To make it possible to obtain the output of a continuous level as an unlock signal during an unlock period without integrating circuits requiring large- capacity capacitors, etc. CONSTITUTION:Unlock signal of PLL circuit 14 is applied to the set terminal of set/reset flip flop 6. Output Q1 of flip flop 6 is applied to AND circuit 7 together with instruction signal TUL and is applied to the D terminal of latch circuit 8. The output of latch circuit 8 is applied to the D terminal of latch circuit 9, and the output of latch circuit 9 is decided by controller 11; and when the output disapperas in latch circuit 9, output Q2 of output port 12 which has been set to ''1'' is returned to original ''0'' by next instruction signal TUL by controller 11 simultaneously with changing of the oscillation frequency. |
