Virtual memory data processing system.

摘要

This invention relates to a virtual memory data processing system, and the specification describes such a system in which apparatus is provided for enabling I/O adapters (4) to use virtual addresses. After each I/0 data transfer, the main memory (5) address involved in the transfer is incremented. This address is maintained in I/O register associated with the I/O adapter (4) performing the transfer. If a page boundary is crossed in the process of incrementing, the channel (3) forms an I/O event indicating the page crossing and calling for translation of the incremented address. When the I/O adapter (4) involved in the page crossing attempts a further data transfer, the channel (3) disconnects the I/O adapter. The channel (3) holds the I/O adapter (4) disconnected until the page crosing denoted by the I/O event has been resolved by translating the incremented address and providing a new main memory address for continuing the data transfer. Because the disconnect is effected by ignoring the priority of the disconnected adapter when it requests service, other adapters of lower priority can be serviced by the channel during the disconnect. When completion of the address translation is signalled, the I/O adapter is no longer held disconnected.