| 摘要 |
1368283 Semi-conductor devices SONY CORP 30 July 1971 [31 July 1970] 35996/71 Heading H1K In a semi-conductor device breakdown voltage of the surface adjacent part of a PN junction is increased by disposing on it an oxide layer overlain by a layer of non-monocrystalline silicon at least 1 Á thick which may in turn be covered with oxide. The layers may additionally serve to interrupt the surface channels associated with oxide passivation. The non-monocrystalline silicon, which may be P or N doped or intrinsic, is preferably deposited by thermal decomposition of silane. In a planar PN diode the silicon forms an annulus over the junction while in a PN mesa diode it extends over the entire mesa apart from the contact area. In both cases the highest breakdown voltage is achieved with the semi-conductor surface lying in a 110 crystallographic plane. In a planar diode with concentric guard rings the silicon extends over the areas of the substrate between the rings and the diode junction and over all the junctions. Two PNPN devices are described. The first is a planar SCR of annular configuration, two of the junctions of which are overlain by the silcon. In the second, Fig. 11, N-type silicon deposited over the basic planar diode structure shown is monocrystalline over the P-type zone 92 of the diode and polycrystalline elsewhere. Outer P- type zone 97 is formed by oxide-masked diffusion. Finally in a planar monolithic circuit comprising a junction isolated transistor both the collector junction and the isolation junctions are overlain by the non-monocrystalline silicon. |
