| 摘要 |
PURPOSE:To obtain an output which is accurately reproduced from an input signal by adding a transfer clock signal capable of giving the identical charge transfer time for one transfer cycle both at the times of low-speed driving and high-speed driving. CONSTITUTION:The X direction indicates the charge transfer direction and the Y direction indicates the depth of potential. 1 is a DC gate layer, 2 is a bent diffusion layer which connects channels, 3 is a DC gate layer, and 4 is a transfer gate. When the charges in the layer 2 are transferred to the layer 4, the quantity transferred is determined by the elapsed time from the start of the transfer and depends on the heat-radiation effect at the end. Therefore, the constant value is not reached within the normal transfer time. If the transfer time for one tansfer period varies, excess or shortage of the charges depending on the difference occurrs, generating false signals in a spike shape. Therefore, if the charge transfer time from the diffused layer is kept constant in each transfer period all the time during the driving operation, the false signals can be prevented and the input signal is accurately reproduced to become the output signal. |
