发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To obtain a memory device where a low-speed operation can be performed and the occupied area is small, by setting current rise of two transistors, which constitute a flip flop-type memory cell, unbalanced and connecting another transistor to collectors of them to perform read operation. CONSTITUTION:NPN transistors T1 and T2 have emitters connected commonly and have bases connected to collectors of each other, and one of them becomes non-conductive when the other becomes conductive, and they form an FF memory. Storage contents of transistors T1 and T2 are read out from digit line D through reading NPN transistor T6 by a low-speed operation without using a complicated sensor and utilizing the electrostatic capacity when first and second line selection lines R and W are made high-potential. Write through PNP transistor T5 is also performed well by current rise unbalance dependent upon the base region difference of transistors T1 and T2, etc. Further, line selection line R extends to insulating region 32 of the collector of T6 and is used for jumper function, so that the cell may be small-size furthermore.
申请公布号 JPS5555497(A) 申请公布日期 1980.04.23
申请号 JP19780128602 申请日期 1978.10.20
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 AOKI KIYOSHI;ICHISE TAAKI
分类号 G11C11/411;H01L21/8229;H01L27/102;H03K19/091 主分类号 G11C11/411
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