发明名称 TEST USE INTERLOCK CIRCUIT FOR REACTOR PROTECTION SYSTEM
摘要 PURPOSE:To enable the excitation of relay, by providing the simulation input switch and logical bypass switch removable other than the test switch, independently of the state of selection of the test switch. CONSTITUTION:The state of selection of the simulation input switch TJSW is given to one input of the logical product circuit AND2, and as another input, the logical product of the state of selection of the test switches SW1 and SW2 or that of the logical bypass switch BYSW is given. TJSW is placed near the simulation input jack TJ and it is selected to ''TEST'' side when tested with the simulation input. BYSW is free from removal and it is mounted only at test run or periodical inspection. BYSW is turned on when the relay RL is desired to be excited independently of the state of selection of the test switches SW1 and SW2. The state of output of the logical sum circuit OR2 is displayed on the lamp EL.
申请公布号 JPS5552107(A) 申请公布日期 1980.04.16
申请号 JP19780124754 申请日期 1978.10.11
申请人 发明人
分类号 G05B9/02;G05B23/02;G21C7/00;G21C7/36;G21C17/00 主分类号 G05B9/02
代理机构 代理人
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