| 摘要 |
A heterodyne phase lock system is disclosed having a plurality of oscillator circuits, a similar plurality of heterodyne (mixer-filter) circuits representing an input circuit, and a similar plurality of heterodyne circuits representing a control circuit, at least one of the oscillator circuits being a voltage controlled oscillator (VCO) circuit. The heterodyne circuits of the input circuit are cascaded, i.e., linked each to the other, successively, and the heterodyne circuits of the control circuit are likewise cascaded. Each oscillator is linked to a pair of heterodyne circuits, i.e., to one heterodyne circuit in the input circuit and to one heterodyne circuit in the control circuit, and applies a common output signal to said pair of heterodyne circuits. The control circuit includes a phase lock circuit, and is responsive to an applied reference signal for adjusting the output of the VCO and correcting for or substantially cancelling frequency drift, residual FM, and phase noise introduced into the system by the oscillators. This manner of linking oscillators to both heterodyne input and control circuits in a system so as to be able to correct, by adjusting a single oscillator, for frequency drift, residual FM, and phase noise from all of the oscillators in the system, is applicable to receiver and generator type systems alike. The system also includes an offset oscillator for tuning the system.
|
