| 摘要 |
A symptom compression device receives binary coded information including bits signifying symptoms present in the course of each operating cycle at selected points in an integrated logical network, microprocessor or the like. The device includes a first register, a second shift register, an EXCLUSIVE OR logic network, and a display. The binary coded information is received on parallel inputs of the first register and applied from parallel outputs of the first register to a set of inputs of the EXCLUSIVE OR network, a second set of inputs which is connected to at least some parallel outputs from the second shift register. A set of outputs from the EXCLUSIVE OR network is connected to parallel inputs of the second shift register. In each cycle, the bits in the second shift register, which accumulate information representative of symptoms, are shifted in one direction and are recirculated. The display is connected to the parallel outputs from the second shift register. In a second embodiment, a third shift register receives the output from the EXCLUSIVE OR network. A multiplexor selectively applies signals from the outputs of the second or third shift register to the second set of inputs. The bits in the third shift register, which also accumulate information as to symptoms, are shifted in the opposite direction. A second display is connected to the outputs of the third shift register.
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