| 摘要 |
PURPOSE:To reduce the capacity of a ROM and to make the comparator of address data simple and small-scale by providing the ROM for storing the data of a low-order bit by the data of 1 bit and storing the address data of the total bits with the data of a high-order bit, in one address. CONSTITUTION:An address designating circuit 1 decides the address data of N bits in which data of low-order (n) bits are all the same value, for instance, as the address data of a stop mode, and outputs its output instruction from an output terminal 11. A ROM 2 stores data of low-order (n) (n>=2) bits by data of 1 bit, and stores the address data of total (N-n+1) bits with the data of high-order (N-n) bits, in one address. Accordingly, when lower (n) bits of the address data of N bits which become the object of comparison are all the same data, the number of data in one address of the ROM 2 can be decreased to (N-n+1) from conventional N. In such a way, the ROM capacity can be reduced and the number of data lines can be reduced. |
