| 摘要 |
PURPOSE:To quicken an error correcting process by making error correction of one data to n-bit parallel. CONSTITUTION:Parallel data of n-bits is supplied to parallel divider circuit 24 and change-over switch 25 of coder 20; circuit 24 performs n-bit division processing according to generating polynomial G(x) and then outputs the residue of the division of data by G(x) at an input end of all bits of the data, and switch 25 switches at every fixed bits to output a coding output to transmission line 21. In decoder 22, on the other hand, input data is supplied to parallel divider circuit 29 through memory method 27 and gate 28 and the output of circuit 29 with the same function as circuit 24 is made to agree with an error bit pattern by multiplier circuit 30; when the error pattern is detected, gate 34 is opened to perform OR-ELSE processing with the output of method 27, thereby making error corrections. |
