发明名称 TIMING PHASE SYNCHRONIZATION SYSTEM
摘要 PURPOSE:To attain high-speed synchronous drawing by estimating a zero-cross point from a sampled value differing in code among the sampling outputs of timing signal components. CONSTITUTION:Reference frequency (fo) is divided by divider circuit 1 and then applied through pulse control circuit 2 to divider circuit 3, whose output is also applied as sampling pulse (fs) to sampling circuit 4. On the other hand, a timing signal component of mean frequency (ft) is passed through circuit 4 and timing signal component extraction circuit 5 extracts a timing signal. Here, zero-cross point estimation circuit 6 estimates a zero-cross point through linear approximation using a sampled value differing in code among outputs of circuit 5. As a result, the number of pulses to be shifted is sent from pulse-number setting circuit 7 to pulse control circuit 2, where output pulsed of divider circuit 1 are extracted. In this way, phase synchronization can be carried out at a high speed.
申请公布号 JPS5546627(A) 申请公布日期 1980.04.01
申请号 JP19780119676 申请日期 1978.09.28
申请人 FUJITSU LTD 发明人 MURANO KAZUO;HAYASHI TATSUKI;UMIGAMI SHIGEYUKI;AMANO FUMIO;ITOU YASUKAZU
分类号 H04L7/033 主分类号 H04L7/033
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