| 摘要 |
PURPOSE:To obtain an easy-to-operate error detection system by eliminating the need of an excessive memory cycle by providing 1st memories stored with data and a 2nd memory with error codes. CONSTITUTION:Data of one block are written in 1st memories FM1 to FMn and from those written data, an error code is generated by 1st generating circuit 12 and then stored in 2nd memory SM. When the data are read out, data is read out from 1st memories FM and at the same time, an error code for a read is generated by the 2nd generating circuit 14 from those data. Next, error detection circuit 15 makes a comparison between this read error code and the write error code stored in the 2nd memory SM to detect an error. In this way, an easily-operated error detection system is realized. |
