| 摘要 |
<p>PURPOSE:To erase data in a short time and also to reduce elements in number by erasing data electrically and then by composing a memory cell of a floating gate field effect transistor. CONSTITUTION:For write operation, any memory cell is selected by row decoder 15 and a column decoder and a write voltage of, e.g. +25V is applied to terminal 20. At this time, the cathode common connection point of two diodes 33 and 34 reaches the voltage of +25V as well. Here, when transistor 13a turns ON, floating gate field effect transistor 11a is considered to be selected and writing operation of data starts. To erase data, an erasing voltage of, e.g. -40V is applied to terminal 20 and a voltage of, e.g. +40V is applied as power supply Vss.</p> |
