发明名称 Initialization of cache store to assure valid data
摘要 A data processing system includes a central processor subsystem, a main memory subsystem and a cache subsystem, all coupled in common to a system bus. During the overall system initialization process, apparatus in the cache subsystem effects the transfer of information from the main memory subsystem to the cache subsystem to load all address locations of the cache subsystem. The transfer of information from the main memory subsystem to the cache subsystem starts from the lowest order address locations in main memory and continues from successive address locations until the cache subsystem is fully loaded. This assures that the cache subsystem contains valid information during normal data processing.
申请公布号 US4195341(A) 申请公布日期 1980.03.25
申请号 US19770863094 申请日期 1977.12.22
申请人 HONEYWELL INFORMATION SYSTEMS INC 发明人 JOYCE, THOMAS F;PANEPINTO, WILLIAM JR
分类号 F02B75/02;G06F11/22;G06F12/08;(IPC1-7):G06F13/00;G11C9/06 主分类号 F02B75/02
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