发明名称 MICROCOMPUTER INTERRUPTION PROCESSING CIRCUIT
摘要 PURPOSE:To simplify program debugging by providing a one-chip microcomputer appreciation chip with a top-priority interruption input terminal, a circuit which processing request signals on preferantial bais, and another circuit which holds the interruption process of other signals. CONSTITUTION:Microcomputer muCM is provided with top-priority interruption teminal 3a and its interruption signal, non-mask interruption signals from terminals 1d and 1e, and an interruption signal which can be masked are applied to in terruption request FF 22-24 through synchronizing circuits 21a- 21c. From FF 22-24, interruption request signal 4c is generated via gate 29 and interruption address generating part 30 generates interruption addresses 4d and 4e determined according to the priority order of interruption requests. Although interruption requests FF are reset by interruption acception signal 4f, interruption inhibition FF26 is set in case of a monitor interruption request and processes of a non- mask request and an interruption which can be masked are held during the monitor interruption processing time. Consequently, the internal state of muCM can be operated freely and program debugging is simplified.
申请公布号 JPS5537646(A) 申请公布日期 1980.03.15
申请号 JP19780110420 申请日期 1978.09.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAKAO TAKASHI;DAIMATSU YOSHIAKI;SUZUKI TOSHIAKI;MAYUMI KAZUAKI
分类号 G06F9/46;G06F9/48;G06F11/36 主分类号 G06F9/46
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