| 摘要 |
PURPOSE:To shorten the rise time and decay time for pulses, enlarge output and reduce power consumption in a clock driver circuit by constituting the clock driver circuit by means of two inverter circuits and one transistor. CONSTITUTION:A clock input signal is entered into input terminal 1 and, when the input sides of inverters 5 and 6 are logic ''1'', the inside output transistors of inverters are connected and the output sides become logic ''0''. Therefore, transistor 7 is disconnected and output terminal 4 becomes logic ''0''. In case of no input clock signal, each operation is reversed, so that the logic of output terminal 4 becomes ''1''. in any status, any one of transistors, transistor 7 or transistors in inverters 5 and 6, is connected, so that the impedance in the output terminal 4 is reduced, the rise time and decay time for pulses are shorten and the constant collector current does not flow in the circuits. |
