发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
PURPOSE:To carry out writing and reading operations effectively even at low voltage by having two gates and using a transistor turned ON by controlling the gates simultaneously, and a transistor controlled by one gate. CONSTITUTION:The semiconductor memory element comprises two gate of MOS transistor Q1 and a one gate MOS transistor Q2. The drain D1 of the transistor Q1 is connected to a bit line B1 and the source S1 is connected to the earth line. The first gate G11 is connected to the word line W and the second gate G12 is connected to the source S2 of the transistor Q2. The gate G2 of the transistor Q2 is connected to the work line W and the drain D2 is connected to the bit line B2. |
申请公布号 |
JPS5534348(A) |
申请公布日期 |
1980.03.10 |
申请号 |
JP19780106759 |
申请日期 |
1978.08.31 |
申请人 |
FUJITSU LTD |
发明人 |
MOGI JIYUNICHI;MIYASAKA KIYOSHI |
分类号 |
G11C11/405;G11C11/404;H01L21/8242;H01L27/10;H01L27/108;H01L29/78 |
主分类号 |
G11C11/405 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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