发明名称 MEMORY DEVICE
摘要 PURPOSE:To carry out the high speed processing by selecting a plurality of bit lines simultaneously and providing more than one block satisfying the particular conditions. CONSTITUTION:There is provided more than one block satisfying the following conditions. At first, bit line B of positive integer number K (K>=2) in which the respective one of the memory cell of one bit is connected through the gate controlled by the signal given to the common word line, positive integer l (l>=1) select line S and positive integer m (m>=2) data line D are included. K bit lines B are respectively connected to m data lines D through the gate circuit controlled by the signal applied to the select line S.
申请公布号 JPS5534356(A) 申请公布日期 1980.03.10
申请号 JP19780107039 申请日期 1978.08.31
申请人 NIPPON ELECTRIC CO 发明人 OOTSUKA TOSHINORI
分类号 G11C11/41;G11C7/00;G11C7/10;G11C11/413 主分类号 G11C11/41
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