发明名称 MULTI ASSUMPTION SPACE CONTROL SYSTEM
摘要 PURPOSE:To enhance the processing ability of the computer by recording the information such as segment head address, segment size and page size in the respective entry of TLB. CONSTITUTION:TLB 24 has a plurality of entries. In the respective entry, the effective bit V, the contents SBR of the segment register 22 memorizing the segment head address, the segment size SS or the page size PS and the actual page address RA and the like are recorded. TLB 24 is indexed by the contents of the assumption address register VA, and the registers 22, 23. In the case that there is no entry corresponding to TLB, one entry is selected by the displacement algorithm and in it the actual page address, the register 22, 23 contents and the assumption address are recorded. In this manner, SBR stack is not necessary and the processing ability of the computer can be enhanced.
申请公布号 JPS5534337(A) 申请公布日期 1980.03.10
申请号 JP19780106505 申请日期 1978.08.31
申请人 FUJITSU LTD 发明人 KOYABU MASAO;ITOU MIKIO
分类号 G06F12/10;G06F12/08 主分类号 G06F12/10
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