| 摘要 |
PURPOSE:To improve error detection performance without increasing components in number by providing a unit information vertical check bit making use of an excessive loop and error detecting horizontal check bit of a block unit information to a stand-by loop. CONSTITUTION:When chip (n) among excessive chips x+1-(n) of practical chips 1-x (x<=n-2) constituting a shift-register-shaped magnetic bubble memory is used as vertical parity check bit 5, the error of unit information is detected, so that a decision on whether an error occurs to one bit of information transferred between major loop 2 and minor loops 1-(m) will be made. On the other hand, when loop (m) is used as horizontal parity check additional bit 6 by making use of stand-by loops m-3-m of loop 0-(m), the error of information is detected, block by block. Therefore, a decision on what bit of information an error occurs is made by both bits 5 and 6 and error detection performance improves without increasing additional circuit components in number, so that the LSI will be controlled with high reliability. |
