发明名称 CHECK CIRCUIT FOR ERROR CORRECTING CIRCUIT
摘要 PURPOSE:To make it possible to check each error correcting circuit by comparing a check bit read from the memory with the check bit stored in the register. CONSTITUTION:Write data WD based on test data SD and check data WDC corresponding to write data WD are written in the whole addresses of memory 1. After entering Data RD read from memory 1 into check circuit 2 and check bit PDC into inversion circuit 3, inverting the check bit on the basis of the output of control circuit 13 and generating artificial errors, the read data are rewritten. A series of the operation is repeated. After completing the operation twice, the contents of the whole addresses of memory 1 are read out one by one, the read check bit is compared with the check bit stored in register 11 in coincidence circuit 12 and then each error correcting circuit is checked on the basis of the output of coincidence circuit 12.
申请公布号 JPS5532110(A) 申请公布日期 1980.03.06
申请号 JP19780104518 申请日期 1978.08.28
申请人 FUJITSU LTD 发明人 KIKUCHI MIYOSHI
分类号 G06F11/08;G06F11/10;G06F12/16;G11C29/00 主分类号 G06F11/08
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