| 摘要 |
PURPOSE:To obtain the bit parallel output by supplying once the pulse input of over 2 into the memory and then forming these parallel signals into the bit serial output. CONSTITUTION:The rise is detected at waveform shaping part 12 for the pulse input given from input terminals 11-1-11-4, and corresponding pluse output SV1- SV4 are supplied to the corresponding register within memory 13. These pluse output are then read out every fixed time, and the signals PI1-PI4 are supplied to P/S conversion part 14 in parallel to be delivered in the form of bit serial signal Sout. This signal is then applied to counter 15 and also delivered through terminal 19. Counter 15 counts signal Sout to deliver it every fixed time in the form of the n-bit parallel signal. This system can be used effectively to the addition of the random pulse input for plural channels. |
