| 摘要 |
PURPOSE:To simplify the circuit constitution by eliminating the gain limitation to the switching IGFET, obtaining two output of different properties and then delivering both or either one of the two output, thus reducing the power consumption in the expecting state. CONSTITUTION:Enhancement-type FET32 is connected between driver IGFET31 and load IGFET33. Control signal CE is applied to the gate of FET32, 1st output 34 is connected to the joint of FET32 and 33, and 2nd output 35 is connected to the joint of FET31 and 32. Then signal CE delivers the value equal to power voltage VDD to output 34 and against the negation value level and also delivers the negation value to output 35 and against the truth value input. Such basic circuit is connected in two steps and vertically to form a logic circuit. And FET41-43 of the front-step circuit are actuated as the inverter gates, and the output of the front-step is connected to the input of next-step FET44-46. Then signal CE is applied to FET42 and 45 in parallel, thus realizing reduction of the power consumption in the expecting state with a simple circuit constitution. |
