CLOCK GATED DIGITAL DATA ENCODING CIRCUIT

摘要

CLOCK GATED DIGITAL DATA ENCODING CIRCUIT BY EARL R. WINKELMANN AND ROBERT S. BRIGGS, JR. "" A digital data encoding circuit for use in a one-way transmission system utilizes three 8-bit multiplexers to generate and transmit a 64-bit message. Each bit in the message comprises a 4-chip, or time slot, code that includes an embedded clock therein. The encoding circuit repetitively generates the 64-bit coded message but only enables transmission of one message during periodically recurring intervals. In the event a priority message is sensed, the time between the intervals is reduced so that the rate of message transmission is increased.