| 摘要 |
A frequency generator of the digitally settable type comprises several voltage-controlled oscillators, specifically a pair of pilot oscillators and a final oscillator, provided with respective phase-locking loops each including a phase discriminator. The loops of the pilot oscillators further include respective frequency dividers whose step-down ratios are controlled by setting commands stored in associated memories which can be reloaded, under the control of manually or automatically adjustable selectors, only in the presence of an enabling pulse generated by a coincidence circuit with inputs connected to the outputs of a source of reference frequency and of the several stages of a chain of binary dividers connected to that source, certain of these stage outputs delivering comparison frequencies to the phase discriminators fed by the frequency dividers of the pilot oscillators. The phase discriminator associated with the final oscillator has one input connected to a mixer and another input connected to one of the pilot oscillators, the mixer receiving operating frequencies of the other pilot oscillator and of the final oscillator. A timing device such as a monoflop may be triggered by the enabling pulses for temporarily disabling the final phase discriminator, or restricting its dynamic range, to suppress fluctuations in the output frequency due to transient oscillator instability. The emission of such inhibiting pulses may be limited to switching operations involving both pilot oscillators, as upon the occurrence of a denominational carry.
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