发明名称 |
APPARATUS, INCLUDING DELAY MEANS, FOR SAMPLING AND RECOVERING DATA RECORDED BY THE LE TRANSITION RECORDING TECHNIQUE |
摘要 |
<p>Data and clock bits are sampled by use of two delay means such as shift registers which are enabled at a clock rate which is set so that a first such delay means coupled to receive the bits includes no more than one bit therein at any time. The receipt of a bit substantially at the midway point of the second delay means, which is coupled serially to receive bits from the first delay means, causes a sampling signal to be generated in response to which a determination is made as to whether another bit has been received by the first delay means. Further logic is provided to recover the data bits.</p> |
申请公布号 |
CA1073115(A) |
申请公布日期 |
1980.03.04 |
申请号 |
CA19770273799 |
申请日期 |
1977.03.11 |
申请人 |
HONEYWELL INFORMATION SYSTEMS INC. |
发明人 |
RATHBUN, DONALD J. |
分类号 |
H03M5/12;G11B20/14;H04L25/49;(IPC1-7):06F7/28;03K5/00 |
主分类号 |
H03M5/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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