| 摘要 |
PURPOSE:To ensure driving of the address buffer with no sacrifice of the access time by producing the trigger clock newly from the enable signal through the delay circuit and without using the enable signal which produces the driving clock directly for the trigger clock. CONSTITUTION:In the clock generation circuit of the entire semiconductor memory, trigger clock delay circuit 5 is constituted by the 2-step inverter, and the delay time necessary for the address buffer can be produced freely by selecting appropriately the constant of the 2-step inverter. And the set-up time can be insured sufficiently, furthermore the actuation of the address buffer being secured with no loss of the access time. |
