| 摘要 |
PURPOSE:To realize a high-speed and high-density memory by using the semiconductor element which features the S-type negative resistance I-V characteristics and the inter-terminal minimum voltage controlled by the potential of the 3rd electrode for turn-on from the low-current state to the high-current state. CONSTITUTION:MOS transistor 1 features the punch-through property with reduction of channel length L to cause the S-type negative resistance. In this connection, the inverter consisting of load resistance 3 and transistor 1 contains two action points. As transistor 1 changes from low-current state (a) to high-current state (b) by turn-on, the minimum voltage of drain potential VD varies by gate potential X1 of transistor 1. Then transistor 1 is connected to word line X1, selective transis- tor 2 and bit line Y, thus forming the memory element with X1, X2 and Y selection. |
