发明名称 Instruction commands speeding up circuit in calculators - uses counters to establish preferential hierarchy of subroutines
摘要 <p>Considerable delays in the running of programmes in calculators can result from the calling up of sequences of instructions from a remote selective access memory to operate on data within the working memory. The system allows for chains of instructions to be commanded together according to the frequency of their use rather than waiting for commands to call each individual sequence. The system allows the command unit to access the data backing memory without waiting for operating instructions to be executed. Each time subroutines are called they increment counters which establish prefered chains of instructions which are called together on subsequent occassions. The counters governing the preference hierarchy can be overriden from the command unit, and are read in a comparison method to determine the sequence called.</p>
申请公布号 FR2432735(A1) 申请公布日期 1980.02.29
申请号 FR19790018531 申请日期 1979.07.12
申请人 IBM 发明人
分类号 G06F12/00;G06F9/06;G06F12/02;G06F12/08;(IPC1-7):06F9/06;06F13/00 主分类号 G06F12/00
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