| 摘要 |
PURPOSE:To secure the accurate demodulation for the NRZ data by locking the voltage control oscillator of the PLL at the time point when the output cycle reaches the prescribed level and in accordance with the zero crossover pulse of the NRZ reproduction data received the modified FM modulation. CONSTITUTION:The zero crossover pulse of the reproduction NRZ data delivered by zero crossover detector 5 is turned to the pulse of 1/2 cycle T of the NRZ data via delay circuit 6 and then undergoes the phase comparison through phase comparator 7 via the AND output produced through gate 10 of the zero crossover pulse of detector 5 and the oscillation output of voltage control type oscillator 9. Thus the PLL comprising gate 10, comparator 7, oscillator 9 and others is locked when the output cycle of oscillator 9 features 1/2XT. And the phase comparison can be carried out accurately to the zero crossover pulse corresponding to the 1-center of the NRZ data as well as to the zero crossover pulse corresponding to the O-boundary of the NRZ data each. As a result, the NRZ data can be demodulated accurately via D-type FF16 driven by the clock and via the output of circuit 9 which passed through gate 14 using the division output of 1/2 divider 12. |
