Current mode logic circuit

摘要

A current mode logic circuit providing AND/OR type functions wherein "0" voltage level changes and spikes are substantially eliminated without sacrificing switching speeds by omitting conventional emitter and collector-dotting between the logic input gates and an emitter-follower output stage. The input gates employ diode loads for generating reduced signal swings for driving the output gate. The output gate contains more devices than a single emitter-follower output stage, but the reduced signal swing and a push-pull drive mode for the output gate offsets any increased switching times due to the greater number of devices and thus achieves the overall objectives without any overall sacrifice in switching speed.