DUTY CYCLE CONTROL CIRCUIT

摘要

PURPOSE:To secure an automatic control for the duty cyle of the output pulse signal by making use of the voltage of the DC level according to the duty cycle of the output pulse signal to the DC bias of the amplifier circuit of the input AC signal. CONSTITUTION:The AC signal Sphi is supplied to reverse amplifier I1 via coupled capacity 15. The DC bias is supplied to amplifier I1 from duty cycle detection part 1 via resistancd 14. Based on this bias, Sphi receives the waveform shaping and amplification and accordingly varies in accordance with the duty cycle of the output pulse of amplifier I1. After this, reverse amplifier I2 gives the waveform shaping and amplification to I1 output, and the output is applied to pulse generation circuit 16 to be changed into pulse signal phi0 and then applied to the gate of MOSFET4 of part 1. FET4 is turned on and off by the high or low level of signal phi0. As a sresult, the DC bias is obtained through filter F and in accordance with the duty cycle of signal phi0 to be applied to input signal Sphi.