发明名称 DATA STRING REARRANGEMENT UNIT
摘要 PURPOSE:To make the rearrangement of high-speed data by a low-speed memory by dispersing and storing a data string on a communication line and then by simultaneously reading, bit by bit, the contents at corresponding addresses from respective memories according to the constitution of a conversion matrix. CONSTITUTION:This unit is equipped with series-parallel converter 11 which converts series input data into parallel data of (m1)-bit words, memory parts #1 to #m2 divided into the (m2)-number memory elements 15 and available for word-by- word writing, and method 14 of writing parallel data to memory elements according to the constitution of rows of the conversion matrix. Further, this is provided with method 18 of reading, bit by bit, the contents of corresponding addresses from respective memory elements at the same time according to the constitution of columns of the conversion matrix, and parallel-series converter 22 which converts the output of the reading method into series data and then outputs it. Consequently, the rearrangement of high-speed data can be performed by the low-speed memory.
申请公布号 JPS5526715(A) 申请公布日期 1980.02.26
申请号 JP19780099005 申请日期 1978.08.16
申请人 KOKUSAI DENSHIN DENWA CO LTD 发明人 OKINAKA HIDEO;YASUDA YUTAKA;OGAWA AKIRA
分类号 H03M9/00;H03M13/27;H04B14/04;H04L1/00 主分类号 H03M9/00
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