| 摘要 |
PURPOSE:To follow the objective locus, by storing the information of advanced timing and drive energy amount to the memory, and sequentially reading out the information through the address input for the output of the counter counting the clock pulse. CONSTITUTION:When the reset signal R to the counter 2 is released with the start instruction, the counter 2 starts the count of the clock pulse CK inputted and outputs the count value. The memory 3 takes the output of the counter 2 as the address input and the stored data is sequentially read out. The forward and reverse information 2 among the data read out is directly fed to the phase signal generator 8, and the advanced timing information beta takes synchronism with the clock pulse CK via the gate 7 and is fed to the phase signal generator 8 as the phase change pulse signal. The drive voltage information gamma is converted into analog signal via the DA converter 4 and is fed to the regulated power supply source 5. |
