| 摘要 |
PURPOSE:To make it possible to simplify a refresh memory and drive a memory dynamically by accessing a memory cell in a low level through an enhancement PMOS transistor. CONSTITUTION:When control line R of decoder ad refresh circuit 12 provided with low decoder 14 for a CMOS NAND gate and refresh circuit 13, which is formed by enhancement PMOS transistors EP2, N and PMOS transistors NE3, PE4 and PE5, etc., becomes high-level, transistors PE5 and PE4 are turned off and on respectively, and enhancement PMOS transistor PE1 is conductive in a low level, and memory cell 11 becomes a low-access state. Consequently, there is no through current dependent upon the power source voltage; and the charge of Nodel is discharged in case that data storage part Nodel of cell 11 is low-level, and the high level precharged previously in data line L is stored in Nodel in case that Nodel is high-level, so that the refresh circuit can be simplified, and the memory cell can be driven dynamically. |
