发明名称 MEMORY SWITCHING UNIT
摘要 PURPOSE:To make it possible to make a memory element multifuntional by controlling the memory element, where various memories are incorporated, through gate circuits corresponding to switching of switches. CONSTITUTION:A memory element is constituted by different kinds of memory such as RAM1 and PROM2, and NOR gates 3a to 3c and 4a to 4c whose switching are controlled by the switching of switches 5a to 5c correspond to memories 1 and 2 respectively. Consequently, control signals which pass through gates 3a to 3a and 4a to 3c control memories 1 and 2 according to the switching of switches 5a to 5c, thereby making the memory element multi-functional.
申请公布号 JPS5517860(A) 申请公布日期 1980.02.07
申请号 JP19780090271 申请日期 1978.07.24
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 ISONO YOSHINOBU;EBIHARA SHIGERU
分类号 G11C17/00;G06F12/06;G11C7/22;G11C14/00 主分类号 G11C17/00
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