Electronic phase locked loop circuit

摘要

An electronic phase locked loop circuit including a variable period sawtooth generator. The sawtooth generator receives digital reference clock signals and in response thereto generates sawtooth-shaped signals having the same period as said reference clock signals. A sample and hold circuit samples the sawtooth-shaped signals in response to one logical state of a sampling clock. A voltage controlled oscillator is coupled to the output of the sample and hold circuit and oscillates at a frequency proportional to the magnitude of the held sample. A feedback circuit generates the sampling clock by coupling the output of the voltage controlled oscillator to the sampling input of the sample and hold circuit.