Computer fault analysis system - generates simulated fault conditions and stores error message information

摘要

Fault conditions on a particular circuit card (10) of the logic circuitry of a computer are simulated by withdrawing integrated circuit units (23) and imposing a pattern of input and output states containing an error on their terminals (5). These inputs are generates on a separate attachable fault card (20) in which the withdrawn unit (23) is inserted. A supervising computer controls relays (210, 211) which establish the logical ones or zeroes. The incidence of error messages occuring while the main computer runs diagnostic programmes, as well as the card location they correspond to, is stored in a fault library memory.