| 摘要 |
PURPOSE:To intentionally produce an interruption and to carry out the program debug with high efficiency by using a debug mode setting means and an execution mode setting means which inputs the interruption generation request signal. CONSTITUTION:When a single instruction is debugged, a set signal 11 is previously inputted to a mode setting means 2 from a decoding circuit 1. Under such a set state an interruption generation request signal contained in a microprogram is inputted to an AND gate 31 to open this gate 31. Then a debug execution indicating means 4 which uses the output of the gate 31 as its set input is set and an interruption is detected by a shift control circuit 52. While an interruption head address generating circuit 51 produces a head address and the circuit 52 proceeds to the interruption processing. The means 2 is reset when the interruption processing is through and therefore the original instruction can be restarted.
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