| 摘要 |
<p>PURPOSE:To secure the steady extraction of the clock through a simple constitution of circuit by installing the phase detecting means as well as the shift register which delays the reception wave using the carrier extracted through the even multiplication of the reception wave as the shift clock. CONSTITUTION:Modulated wave (b) which is modulated with modulation signal (a) entered terminal 601 is branched off into two parts. And one part is delayed via shift register SR602 using doublemultiplied carrier signal (c) supplied to terminal 605 as the shift lock. Signal (d) delayed through SR602 is supplied to exclusive logic sum circuit 603 along with the otherpart of the branched modulated waves to undergo the phase change point and then extraction of clock component (e). In this case, TCL is equivalent to one cycle of the clock frequency and is set to TCL/2 for the delay time in order to give the maximum amplitude to the extracted clock. As a result, the following property can be improved to the modulated wave, thus ensuring the steady extraction of the clock.</p> |
