发明名称 PHASE SYNCHRONISM CIRCUIT
摘要 PURPOSE:To ensure the operation without out of synchronism, by returning the oscillating frequency to fine tuning range with coarse adjustment, when the frequency of reference signal is greatly changed and the phase difference between the outputs of the reference signal and the controlled oscillator is out of the fine tuning range. CONSTITUTION:When the frequency of reference signal of the oscillator R is greatly changed, the output in excess of the lower limit or upper limit from the phase comparator P is delivered. When it exceeds the upper limit comparison signal Th, the gate Gh is opened, the pulses are added to the counter N, the corresponding voltage is D/A converted to control the oscillator O, the frequency is greatly changed to reduce the phase difference with the reference signal and the output of the comparator P is less than the signal Th. Accordingly, the gate Gh is closed, the addition pulses are stopped, and the counter N keeps a given value. When the output of the comparator P is less than the lower limit signal Tl, the subtraction pulses are added to reduce the count value. Thus, no out of synchronism is caused between the reference signal R and the controlled oscillation O.
申请公布号 JPS555524(A) 申请公布日期 1980.01.16
申请号 JP19780078072 申请日期 1978.06.29
申请人 TAKEDA RIKEN IND CO LTD 发明人 ASHITA HITOSHI
分类号 H03L7/113;H03L7/08 主分类号 H03L7/113
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