| 摘要 |
PURPOSE:To omit various types of overheads by processing the test and diagnosis orders plus the normal order from the same point of view, and thus to realize an easy execution of the test and diagnosis orders even under the operating system. CONSTITUTION:CPU1 gives starting to the command of the address, length and types of operation plus the operation itself for the data transfer or the like to input/ output processor 3 in the case of the input/output order via the order given from main memory device 2. Thus, processor 3 receives these information from CPU1 via universal bus 4 and then carries out the data transfer to device 2. In case the command is for the test and diagnosis orders, the sequence of control memory 33 is controlled freely by the information address given through CPU1. At the same time, the length displays the frequency of execution for the control memory. |
