发明名称 Digital phase multiplier circuit for control devices - has store and two counters, with comparator between store and second counter
摘要 <p>The pulse train to be multiplied is applied to the inputs of two blocks connected in series. The first block output is connected to a store, and that of the second block to a main counter before the store. Clock pulses are applied through a divider to the main counter second input, and directly to an auxiliary counter. A first comparator is between the store and auxiliary counter. Its output is connected to a pulse shaper and, together with the second block through an OR circuit to the auxiliary counter second input.</p>
申请公布号 DE2828527(A1) 申请公布日期 1980.01.10
申请号 DE19782828527 申请日期 1978.06.29
申请人 BROWN,BOVERI & CIE AG 发明人 KUHN,WERNER,DIPL.-ING.
分类号 G06F7/68;(IPC1-7):03K5/156 主分类号 G06F7/68
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