| 摘要 |
PURPOSE:To magnify/reduce a video image by applying separation/digital processing to a video signal and controlling the write/read of the signal to/from a memory based on a specific clock signal with a computer. CONSTITUTION:A dot clock generator 221 receiving a horizontal synchronizing signal HSTV generates a clock signal CKAD being a horizontal dot clock signal HDCK of 1/N period, which is given to an ACD 210. The ACD 210 applies digital processing to a luminance signal LSTV based on the signal HDCK and the processed signal is given to a 3-port video memory 310. The frequency of the signal HDCK is set by a CPU 620 based on number of dots of the signal in the memory 310. Furthermore, the generator 221 generates a basic synchronizing signal BSYNC for a signal to increment a horizontal direction write address of the memory 310. Thus, when a period of the signal CKAD resulting from digital conversion of the luminance signal LSTV is higher than a period of the signal BSYNC, the video image corresponding to the signal LSTV is magnified and when smaller, the video image is reduced. |
