发明名称 DATAJEMFORELSEANORDNING
摘要 Data processing apparatus includes a storage circuit or memory, and an addressing circuit for identifying word locations within the storage circuit into and from which a plurality of information items are to be written and read, respectively. Further, there is included an encoding circuit for encoding at least a part of each information item in one-out-of-n code, illustratively. In turn, the encoded part is successively shifted by a shift circuit so that it is stored in the storage circuit in a manner that the stored information in each word location has a bit order different from that order of any other information item as stored in the storage circuit. A translating or de-skewing circuit is provided for shifting the encoded data items as read out from the storage circuit in a direction opposite to that imparted by the first noted shift circuit.
申请公布号 SE416499(B) 申请公布日期 1980.01.05
申请号 SE19760012897 申请日期 1976.11.18
申请人 * FERRANTI LTD 发明人 G * NUTTER;W * MCGIBBON
分类号 G11C15/04;G06F12/02;G06F17/30;(IPC1-7):06F7/02 主分类号 G11C15/04
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