MASTER CLOCK

摘要

The arrangement includes a first, a second and optionally a third phase-locked loop and a single master oscillator, the first phase-locked loop being externally controlled by the master oscillator, the second phase-locked loop being externally controlled via a first change-over contact either by the clock signal provided at the output of the first phase-locked loop or by the master oscillator, and the third phase-locked loop being externally controlled via a second change-over contact either by the clock signal generated at the output of the first phase-locked loop or by the clock signal provided at the output of the second phase-locked loop. The master oscillator may be constituted by one of the phase locked loop oscillators in its free running mode. The arrangement employs a reduced number of master oscillators.