发明名称 APPARATUS
摘要 A scientific processing unit includes apparatus for performing floating point multiplication operations with operands in binary coded form. The apparatus is constructed from standard multibit LSI microprocessor chips organized into a number of vertical slices. Each chip includes an arithmetic logic unit (ALU) and a random access memory (RAM). The ALU's are used to generate a predetermined number of submultiples of a mantissa portion of a floating point number which are stored in the chips memories. The submultiples are generated by multiplying the mantissa by predetermined factors which correspond to the values of multiplier digit positions selected during the multiplication operation.
申请公布号 AU3756278(A) 申请公布日期 1980.01.03
申请号 AU19780037562 申请日期 1978.06.28
申请人 HONEYWELL INFORMATION SYSTEMS INC., 发明人 DAVID E. CUSHING
分类号 G06F7/487;F02B75/02;G06F7/508;G06F7/52;G06F7/527 主分类号 G06F7/487
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