| 摘要 |
PURPOSE:To ensure an easy acquisition for the balanced output by connecting the 1st and 2nd resistances to the emitters of the 1st and 2nd transistors Tr, the 3rd resistance deciding the amplification factor to the other end of the emitter and the 4th resistance between the 3rd resistance and the emitter potential supply source respectively. CONSTITUTION:The 1st and 2nd resistance 21 and 22 deciding the collector potential are connected to the emitters of Tr1 and 2; 3rd resistance 23 deciding the amplification factor is connected to the other end of the emitter; and 4th resistance 24 is connected between resistance 23 and emitter potential supply source 25 via emitter bias resistance 26 and 27 respectively. When the same potential is applied to both differential input terminal 12 and 13, resistance 24 is controlled so that the identify may be obtained between the base-emitter voltage of Tr1 and Tr2 and the compound voltage of the voltage drop of resistance 21 and 22 caused by the emitter current. As a result, the potential deviation between the base and the emitter of Tr1 and Tr2 is absorbed by resistance 21 and 22, thus obtaining the DC balance between differential terminal 14 and 15 quite easily. |
