| 摘要 |
A signal conditioning circuit for a fixed rise time, variable amplitude receiving system (TACAN) that digitizes the time of arrival and samples the pulse amplitude at the receiver's last intermediate frequency (IF) stage before video detection. The time of arrival measurement is performed by counting a fixed number of successive threshold crossings of the IF carrier, utilizing a pair of comparators having two inputs each. One input of each comparator is coupled to the IF stage. The other input of each comparator is coupled to a point of reference potential, one comparator being referenced to ground and the other being coupled to a small positive threshold voltage level. The output of the grounded comparator is delayed, and the delayed output is used as a clock signal to the remaining circuitry. The output of the threshold comparator provides data pulses, one data pulse being generated each time that the IF signal goes above the threshold value. The data pulses, along with the clock pulses, are applied to an up down shift register which acts as a digital flywheel. The output of the digital fly-wheel enables and disables a counter. |
