WERKWIJZE VOOR HET VERVAARDIGEN VAN EEN GEINTEGREERDE HALFGELEIDERSCHAKELING MET DRIE METALLISATIEPATRONEN DIE BUITEN DE VOOR ELEKTRISCHE CONTACTEN VEREISTE GEBIE- DEN VAN ELKAAR ZIJN GESCHEIDEN DOOR TUSSENLIGGENDE LAGEN VAN ELEKTRISCH ISOLEREND MATERIAAL.

摘要

A 100 percent rework capability on the third level metal enables corrections for failures of first level metal logic elements after multilevel processing, while further reducing the recurring large scale integration. All first level metal pads or primary signal connects are brought to the third level metal, through second level metal with a stacking technique so that any first level metal logic element can be wired bonded into the third level metal signal inter-connect. Any interconnection scheme may be utilized in bringing up all primary signal connects to the third level metal based on the rationale that formerly tested good circuits might become inoperative or previously tested bad circuits might test operable.